C Specification
The VkMemoryRangeBarrierKHR structure is defined as:
// Provided by VK_KHR_device_address_commands
typedef struct VkMemoryRangeBarrierKHR {
VkStructureType sType;
const void* pNext;
VkPipelineStageFlags2 srcStageMask;
VkAccessFlags2 srcAccessMask;
VkPipelineStageFlags2 dstStageMask;
VkAccessFlags2 dstAccessMask;
uint32_t srcQueueFamilyIndex;
uint32_t dstQueueFamilyIndex;
VkDeviceAddressRangeKHR addressRange;
VkAddressCommandFlagsKHR addressFlags;
} VkMemoryRangeBarrierKHR;
Members
-
sTypeis a VkStructureType value identifying this structure. -
pNextisNULLor a pointer to a structure extending this structure. -
srcStageMaskis a VkPipelineStageFlags2 mask of pipeline stages to be included in the first synchronization scope. -
srcAccessMaskis a VkAccessFlags2 mask of access flags to be included in the first access scope. -
dstStageMaskis a VkPipelineStageFlags2 mask of pipeline stages to be included in the second synchronization scope. -
dstAccessMaskis a VkAccessFlags2 mask of access flags to be included in the second access scope. -
srcQueueFamilyIndexis the source queue family for a queue family ownership transfer. -
dstQueueFamilyIndexis the destination queue family for a queue family ownership transfer. -
addressRangeis a VkDeviceAddressRangeKHR structure specifying the address range affected by the barrier. -
addressFlagsis a VkAddressCommandFlagsKHR value defining the flags for the address range.
Description
This structure defines a memory dependency limited to an address range, and can define a queue family ownership transfer operation for that range.
The first synchronization scope and
access scope described by
this structure include only operations and memory accesses specified by
srcStageMask and srcAccessMask.
The second synchronization scope
and access scope described
by this structure include only operations and memory accesses specified by
dstStageMask and dstAccessMask.
Both access scopes are
limited to only memory accesses to memory in addressRange.
If the buffer from which address was queried was created with a
sharing mode of VK_SHARING_MODE_EXCLUSIVE, and
srcQueueFamilyIndex is not equal to dstQueueFamilyIndex, this
memory range barrier defines a queue
family ownership transfer operation.
When executed on a queue in the family identified by
srcQueueFamilyIndex, this barrier defines a
queue family release operation
for the specified address range, and the second synchronization scope does
not apply to this operation.
When executed on a queue in the family identified by
dstQueueFamilyIndex, this barrier defines a
queue family acquire operation
for the specified address range, and the first synchronization scope does
not apply to this operation.
A queue family ownership transfer
operation is also defined if the values are not equal, and either is one
of the special queue family values reserved for external memory ownership
transfers, as described in https://registry.khronos.org/vulkan/specs/latest/html/vkspec.html#synchronization-queue-transfers.
A queue family release
operation is defined when dstQueueFamilyIndex is one of those
values, and a queue family
acquire operation is defined when srcQueueFamilyIndex is one of
those values.
-
VUID-VkMemoryRangeBarrierKHR-addressRange-13097
If the range specified byaddressRangeis not bound completely to memory when accessed,addressFlagsmust not include VK_ADDRESS_COMMAND_FULLY_BOUND_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-addressRange-13098
If the buffer from which the range specified byaddressRangewas created with VK_BUFFER_CREATE_PROTECTED_BIT, andprotectedNoFaultis not supported,addressFlagsmust include VK_ADDRESS_COMMAND_PROTECTED_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-addressRange-13099
If the buffer from which the range specified byaddressRangewas created without VK_BUFFER_CREATE_PROTECTED_BIT, andprotectedNoFaultis not supported,addressFlagsmust not include VK_ADDRESS_COMMAND_PROTECTED_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-addressFlags-13100
addressFlagsmust not include both VK_ADDRESS_COMMAND_STORAGE_BUFFER_USAGE_BIT_KHR and VK_ADDRESS_COMMAND_UNKNOWN_STORAGE_BUFFER_USAGE_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-addressRange-13122
If any buffer, which is bound to a range of VkDeviceMemory that overlaps the range backingaddressRange, was created with VK_BUFFER_USAGE_STORAGE_BUFFER_BIT,addressFlagsmust include VK_ADDRESS_COMMAND_STORAGE_BUFFER_USAGE_BIT_KHR or VK_ADDRESS_COMMAND_UNKNOWN_STORAGE_BUFFER_USAGE_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-addressRange-13123
If any buffer, which is bound to a range of VkDeviceMemory that overlaps the range backingaddressRange, was created without VK_BUFFER_USAGE_STORAGE_BUFFER_BIT,addressFlagsmust not include VK_ADDRESS_COMMAND_STORAGE_BUFFER_USAGE_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-addressFlags-13101
addressFlagsmust not include both VK_ADDRESS_COMMAND_TRANSFORM_FEEDBACK_BUFFER_USAGE_BIT_KHR and VK_ADDRESS_COMMAND_UNKNOWN_TRANSFORM_FEEDBACK_BUFFER_USAGE_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-addressRange-13124
If any buffer, which is bound to a range of VkDeviceMemory that overlaps the range backingaddressRange, was created with VK_BUFFER_USAGE_TRANSFORM_FEEDBACK_BUFFER_BIT_EXT,addressFlagsmust include VK_ADDRESS_COMMAND_TRANSFORM_FEEDBACK_BUFFER_USAGE_BIT_KHR or VK_ADDRESS_COMMAND_UNKNOWN_TRANSFORM_FEEDBACK_BUFFER_USAGE_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-addressRange-13125
If any buffer, which is bound to a range of VkDeviceMemory that overlaps the range backingaddressRange, was created without VK_BUFFER_USAGE_TRANSFORM_FEEDBACK_BUFFER_BIT_EXT,addressFlagsmust not include VK_ADDRESS_COMMAND_TRANSFORM_FEEDBACK_BUFFER_USAGE_BIT_KHR
-
VUID-VkMemoryRangeBarrierKHR-srcStageMask-03929
If thegeometryShaderfeature is not enabled,srcStageMaskmust not contain VK_PIPELINE_STAGE_2_GEOMETRY_SHADER_BIT -
VUID-VkMemoryRangeBarrierKHR-srcStageMask-03930
If thetessellationShaderfeature is not enabled,srcStageMaskmust not contain VK_PIPELINE_STAGE_2_TESSELLATION_CONTROL_SHADER_BIT or VK_PIPELINE_STAGE_2_TESSELLATION_EVALUATION_SHADER_BIT -
VUID-VkMemoryRangeBarrierKHR-srcStageMask-03931
If theconditionalRenderingfeature is not enabled,srcStageMaskmust not contain VK_PIPELINE_STAGE_2_CONDITIONAL_RENDERING_BIT_EXT -
VUID-VkMemoryRangeBarrierKHR-srcStageMask-03932
If thefragmentDensityMapfeature is not enabled,srcStageMaskmust not contain VK_PIPELINE_STAGE_2_FRAGMENT_DENSITY_PROCESS_BIT_EXT -
VUID-VkMemoryRangeBarrierKHR-srcStageMask-03933
If thetransformFeedbackfeature is not enabled,srcStageMaskmust not contain VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT -
VUID-VkMemoryRangeBarrierKHR-srcStageMask-03934
If themeshShaderfeature is not enabled,srcStageMaskmust not contain VK_PIPELINE_STAGE_2_MESH_SHADER_BIT_EXT -
VUID-VkMemoryRangeBarrierKHR-srcStageMask-03935
If thetaskShaderfeature is not enabled,srcStageMaskmust not contain VK_PIPELINE_STAGE_2_TASK_SHADER_BIT_EXT -
VUID-VkMemoryRangeBarrierKHR-srcStageMask-07316
If neither of theshadingRateImageor theattachmentFragmentShadingRatefeatures are enabled,srcStageMaskmust not contain VK_PIPELINE_STAGE_2_FRAGMENT_SHADING_RATE_ATTACHMENT_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-srcStageMask-04957
If thesubpassShadingfeature is not enabled,srcStageMaskmust not contain VK_PIPELINE_STAGE_2_SUBPASS_SHADER_BIT_HUAWEI -
VUID-VkMemoryRangeBarrierKHR-srcStageMask-04995
If theinvocationMaskfeature is not enabled,srcStageMaskmust not contain VK_PIPELINE_STAGE_2_INVOCATION_MASK_BIT_HUAWEI -
VUID-VkMemoryRangeBarrierKHR-srcStageMask-07946
If neither the VK_NV_ray_tracing extension or therayTracingPipelinefeature are enabled,srcStageMaskmust not contain VK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-srcStageMask-10751
If theaccelerationStructurefeature is not enabled,srcStageMaskmust not contain VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-srcStageMask-10752
If therayTracingMaintenance1feature is not enabled,srcStageMaskmust not contain VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-srcStageMask-10753
If themicromapfeature is not enabled,srcStageMaskmust not contain VK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT
-
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03900
IfsrcAccessMaskincludes VK_ACCESS_2_INDIRECT_COMMAND_READ_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT, VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR, VK_PIPELINE_STAGE_2_COPY_INDIRECT_BIT_KHR, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03901
IfsrcAccessMaskincludes VK_ACCESS_2_INDEX_READ_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_INDEX_INPUT_BIT, VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03902
IfsrcAccessMaskincludes VK_ACCESS_2_VERTEX_ATTRIBUTE_READ_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_VERTEX_ATTRIBUTE_INPUT_BIT, VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03903
IfsrcAccessMaskincludes VK_ACCESS_2_INPUT_ATTACHMENT_READ_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT, VK_PIPELINE_STAGE_2_SUBPASS_SHADER_BIT_HUAWEI, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03904
IfsrcAccessMaskincludes VK_ACCESS_2_UNIFORM_READ_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of theVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03905
IfsrcAccessMaskincludes VK_ACCESS_2_SHADER_SAMPLED_READ_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of theVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03906
IfsrcAccessMaskincludes VK_ACCESS_2_SHADER_STORAGE_READ_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of theVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03907
IfsrcAccessMaskincludes VK_ACCESS_2_SHADER_STORAGE_WRITE_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of theVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-07454
IfsrcAccessMaskincludes VK_ACCESS_2_SHADER_READ_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR, VK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT, or one of theVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03909
IfsrcAccessMaskincludes VK_ACCESS_2_SHADER_WRITE_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of theVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03910
IfsrcAccessMaskincludes VK_ACCESS_2_COLOR_ATTACHMENT_READ_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03911
IfsrcAccessMaskincludes VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03912
IfsrcAccessMaskincludes VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_READ_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT, VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03913
IfsrcAccessMaskincludes VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT, VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03914
IfsrcAccessMaskincludes VK_ACCESS_2_TRANSFER_READ_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_COPY_BIT, VK_PIPELINE_STAGE_2_BLIT_BIT, VK_PIPELINE_STAGE_2_RESOLVE_BIT, VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT, VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR, VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR, VK_PIPELINE_STAGE_2_CONVERT_COOPERATIVE_VECTOR_MATRIX_BIT_NV, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03915
IfsrcAccessMaskincludes VK_ACCESS_2_TRANSFER_WRITE_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_COPY_BIT, VK_PIPELINE_STAGE_2_BLIT_BIT, VK_PIPELINE_STAGE_2_RESOLVE_BIT, VK_PIPELINE_STAGE_2_CLEAR_BIT, VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT, VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR, VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR, VK_PIPELINE_STAGE_2_CONVERT_COOPERATIVE_VECTOR_MATRIX_BIT_NV, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03916
IfsrcAccessMaskincludes VK_ACCESS_2_HOST_READ_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_HOST_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03917
IfsrcAccessMaskincludes VK_ACCESS_2_HOST_WRITE_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_HOST_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03918
IfsrcAccessMaskincludes VK_ACCESS_2_CONDITIONAL_RENDERING_READ_BIT_EXT,srcStageMaskmust include VK_PIPELINE_STAGE_2_CONDITIONAL_RENDERING_BIT_EXT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03919
IfsrcAccessMaskincludes VK_ACCESS_2_FRAGMENT_DENSITY_MAP_READ_BIT_EXT,srcStageMaskmust include VK_PIPELINE_STAGE_2_FRAGMENT_DENSITY_PROCESS_BIT_EXT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03920
IfsrcAccessMaskincludes VK_ACCESS_2_TRANSFORM_FEEDBACK_WRITE_BIT_EXT,srcStageMaskmust include VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-04747
IfsrcAccessMaskincludes VK_ACCESS_2_TRANSFORM_FEEDBACK_COUNTER_READ_BIT_EXT,srcStageMaskmust include VK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT, VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03922
IfsrcAccessMaskincludes VK_ACCESS_2_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT,srcStageMaskmust include VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03923
IfsrcAccessMaskincludes VK_ACCESS_2_SHADING_RATE_IMAGE_READ_BIT_NV,srcStageMaskmust include VK_PIPELINE_STAGE_2_SHADING_RATE_IMAGE_BIT_NV, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-04994
IfsrcAccessMaskincludes VK_ACCESS_2_INVOCATION_MASK_READ_BIT_HUAWEI,srcStageMaskmust include VK_PIPELINE_STAGE_2_INVOCATION_MASK_BIT_HUAWEI -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03924
IfsrcAccessMaskincludes VK_ACCESS_2_COMMAND_PREPROCESS_READ_BIT_NV,srcStageMaskmust include VK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_NV or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03925
IfsrcAccessMaskincludes VK_ACCESS_2_COMMAND_PREPROCESS_WRITE_BIT_NV,srcStageMaskmust include VK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_NV or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03926
IfsrcAccessMaskincludes VK_ACCESS_2_COLOR_ATTACHMENT_READ_NONCOHERENT_BIT_EXT,srcStageMaskmust include VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03927
IfsrcAccessMaskincludes VK_ACCESS_2_ACCELERATION_STRUCTURE_READ_BIT_KHR, and therayQueryfeature is enabled,srcStageMaskmust include VK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR, one of theVK_PIPELINE_STAGE_*_SHADER_BITstages, VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR, VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03928
IfsrcAccessMaskincludes VK_ACCESS_2_ACCELERATION_STRUCTURE_WRITE_BIT_KHR,srcStageMaskmust include VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR, VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-06256
IfsrcAccessMaskincludes VK_ACCESS_2_ACCELERATION_STRUCTURE_READ_BIT_KHR, and therayQueryfeature is not enabled,srcStageMaskmust include VK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR, VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR, VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-07272
IfsrcAccessMaskincludes VK_ACCESS_2_SHADER_BINDING_TABLE_READ_BIT_KHR,srcStageMaskmust include VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT or VK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-04858
IfsrcAccessMaskincludes VK_ACCESS_2_VIDEO_DECODE_READ_BIT_KHR,srcStageMaskmust include VK_PIPELINE_STAGE_2_VIDEO_DECODE_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-04859
IfsrcAccessMaskincludes VK_ACCESS_2_VIDEO_DECODE_WRITE_BIT_KHR,srcStageMaskmust include VK_PIPELINE_STAGE_2_VIDEO_DECODE_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-04860
IfsrcAccessMaskincludes VK_ACCESS_2_VIDEO_ENCODE_READ_BIT_KHR,srcStageMaskmust include VK_PIPELINE_STAGE_2_VIDEO_ENCODE_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-04861
IfsrcAccessMaskincludes VK_ACCESS_2_VIDEO_ENCODE_WRITE_BIT_KHR,srcStageMaskmust include VK_PIPELINE_STAGE_2_VIDEO_ENCODE_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-07455
IfsrcAccessMaskincludes VK_ACCESS_2_OPTICAL_FLOW_READ_BIT_NV,srcStageMaskmust include VK_PIPELINE_STAGE_2_OPTICAL_FLOW_BIT_NV -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-07456
IfsrcAccessMaskincludes VK_ACCESS_2_OPTICAL_FLOW_WRITE_BIT_NV,srcStageMaskmust include VK_PIPELINE_STAGE_2_OPTICAL_FLOW_BIT_NV -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-07457
IfsrcAccessMaskincludes VK_ACCESS_2_MICROMAP_WRITE_BIT_EXT,srcStageMaskmust include VK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-07458
IfsrcAccessMaskincludes VK_ACCESS_2_MICROMAP_READ_BIT_EXT,srcStageMaskmust include VK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT or VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-08118
IfsrcAccessMaskincludes VK_ACCESS_2_DESCRIPTOR_BUFFER_READ_BIT_EXT,srcStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one ofVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-10670
IfsrcAccessMaskincludes VK_ACCESS_2_SHADER_TILE_ATTACHMENT_READ_BIT_QCOM,srcStageMaskmust include VK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT or VK_PIPELINE_STAGE_2_COMPUTE_SHADER_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-10671
IfsrcAccessMaskincludes VK_ACCESS_2_SHADER_TILE_ATTACHMENT_WRITE_BIT_QCOM,srcStageMaskmust include VK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT or VK_PIPELINE_STAGE_2_COMPUTE_SHADER_BIT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-11771
IfsrcAccessMaskincludes VK_ACCESS_2_MEMORY_DECOMPRESSION_READ_BIT_EXT,srcStageMaskmust include VK_PIPELINE_STAGE_2_MEMORY_DECOMPRESSION_BIT_EXT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-11772
IfsrcAccessMaskincludes VK_ACCESS_2_MEMORY_DECOMPRESSION_WRITE_BIT_EXT,srcStageMaskmust include VK_PIPELINE_STAGE_2_MEMORY_DECOMPRESSION_BIT_EXT -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-11294
IfsrcAccessMaskincludes VK_ACCESS_2_SAMPLER_HEAP_READ_BIT_EXT or VK_ACCESS_2_RESOURCE_HEAP_READ_BIT_EXT,srcStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one ofVK_PIPELINE_STAGE_*_SHADER_BITstages
-
VUID-VkMemoryRangeBarrierKHR-dstStageMask-03929
If thegeometryShaderfeature is not enabled,dstStageMaskmust not contain VK_PIPELINE_STAGE_2_GEOMETRY_SHADER_BIT -
VUID-VkMemoryRangeBarrierKHR-dstStageMask-03930
If thetessellationShaderfeature is not enabled,dstStageMaskmust not contain VK_PIPELINE_STAGE_2_TESSELLATION_CONTROL_SHADER_BIT or VK_PIPELINE_STAGE_2_TESSELLATION_EVALUATION_SHADER_BIT -
VUID-VkMemoryRangeBarrierKHR-dstStageMask-03931
If theconditionalRenderingfeature is not enabled,dstStageMaskmust not contain VK_PIPELINE_STAGE_2_CONDITIONAL_RENDERING_BIT_EXT -
VUID-VkMemoryRangeBarrierKHR-dstStageMask-03932
If thefragmentDensityMapfeature is not enabled,dstStageMaskmust not contain VK_PIPELINE_STAGE_2_FRAGMENT_DENSITY_PROCESS_BIT_EXT -
VUID-VkMemoryRangeBarrierKHR-dstStageMask-03933
If thetransformFeedbackfeature is not enabled,dstStageMaskmust not contain VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT -
VUID-VkMemoryRangeBarrierKHR-dstStageMask-03934
If themeshShaderfeature is not enabled,dstStageMaskmust not contain VK_PIPELINE_STAGE_2_MESH_SHADER_BIT_EXT -
VUID-VkMemoryRangeBarrierKHR-dstStageMask-03935
If thetaskShaderfeature is not enabled,dstStageMaskmust not contain VK_PIPELINE_STAGE_2_TASK_SHADER_BIT_EXT -
VUID-VkMemoryRangeBarrierKHR-dstStageMask-07316
If neither of theshadingRateImageor theattachmentFragmentShadingRatefeatures are enabled,dstStageMaskmust not contain VK_PIPELINE_STAGE_2_FRAGMENT_SHADING_RATE_ATTACHMENT_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-dstStageMask-04957
If thesubpassShadingfeature is not enabled,dstStageMaskmust not contain VK_PIPELINE_STAGE_2_SUBPASS_SHADER_BIT_HUAWEI -
VUID-VkMemoryRangeBarrierKHR-dstStageMask-04995
If theinvocationMaskfeature is not enabled,dstStageMaskmust not contain VK_PIPELINE_STAGE_2_INVOCATION_MASK_BIT_HUAWEI -
VUID-VkMemoryRangeBarrierKHR-dstStageMask-07946
If neither the VK_NV_ray_tracing extension or therayTracingPipelinefeature are enabled,dstStageMaskmust not contain VK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-dstStageMask-10751
If theaccelerationStructurefeature is not enabled,dstStageMaskmust not contain VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-dstStageMask-10752
If therayTracingMaintenance1feature is not enabled,dstStageMaskmust not contain VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-dstStageMask-10753
If themicromapfeature is not enabled,dstStageMaskmust not contain VK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT
-
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03900
IfdstAccessMaskincludes VK_ACCESS_2_INDIRECT_COMMAND_READ_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT, VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR, VK_PIPELINE_STAGE_2_COPY_INDIRECT_BIT_KHR, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03901
IfdstAccessMaskincludes VK_ACCESS_2_INDEX_READ_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_INDEX_INPUT_BIT, VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03902
IfdstAccessMaskincludes VK_ACCESS_2_VERTEX_ATTRIBUTE_READ_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_VERTEX_ATTRIBUTE_INPUT_BIT, VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03903
IfdstAccessMaskincludes VK_ACCESS_2_INPUT_ATTACHMENT_READ_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT, VK_PIPELINE_STAGE_2_SUBPASS_SHADER_BIT_HUAWEI, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03904
IfdstAccessMaskincludes VK_ACCESS_2_UNIFORM_READ_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of theVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03905
IfdstAccessMaskincludes VK_ACCESS_2_SHADER_SAMPLED_READ_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of theVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03906
IfdstAccessMaskincludes VK_ACCESS_2_SHADER_STORAGE_READ_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of theVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03907
IfdstAccessMaskincludes VK_ACCESS_2_SHADER_STORAGE_WRITE_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of theVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-07454
IfdstAccessMaskincludes VK_ACCESS_2_SHADER_READ_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR, VK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT, or one of theVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03909
IfdstAccessMaskincludes VK_ACCESS_2_SHADER_WRITE_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of theVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03910
IfdstAccessMaskincludes VK_ACCESS_2_COLOR_ATTACHMENT_READ_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03911
IfdstAccessMaskincludes VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03912
IfdstAccessMaskincludes VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_READ_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT, VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03913
IfdstAccessMaskincludes VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT, VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03914
IfdstAccessMaskincludes VK_ACCESS_2_TRANSFER_READ_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_COPY_BIT, VK_PIPELINE_STAGE_2_BLIT_BIT, VK_PIPELINE_STAGE_2_RESOLVE_BIT, VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT, VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR, VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR, VK_PIPELINE_STAGE_2_CONVERT_COOPERATIVE_VECTOR_MATRIX_BIT_NV, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03915
IfdstAccessMaskincludes VK_ACCESS_2_TRANSFER_WRITE_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_COPY_BIT, VK_PIPELINE_STAGE_2_BLIT_BIT, VK_PIPELINE_STAGE_2_RESOLVE_BIT, VK_PIPELINE_STAGE_2_CLEAR_BIT, VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT, VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR, VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR, VK_PIPELINE_STAGE_2_CONVERT_COOPERATIVE_VECTOR_MATRIX_BIT_NV, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03916
IfdstAccessMaskincludes VK_ACCESS_2_HOST_READ_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_HOST_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03917
IfdstAccessMaskincludes VK_ACCESS_2_HOST_WRITE_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_HOST_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03918
IfdstAccessMaskincludes VK_ACCESS_2_CONDITIONAL_RENDERING_READ_BIT_EXT,dstStageMaskmust include VK_PIPELINE_STAGE_2_CONDITIONAL_RENDERING_BIT_EXT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03919
IfdstAccessMaskincludes VK_ACCESS_2_FRAGMENT_DENSITY_MAP_READ_BIT_EXT,dstStageMaskmust include VK_PIPELINE_STAGE_2_FRAGMENT_DENSITY_PROCESS_BIT_EXT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03920
IfdstAccessMaskincludes VK_ACCESS_2_TRANSFORM_FEEDBACK_WRITE_BIT_EXT,dstStageMaskmust include VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-04747
IfdstAccessMaskincludes VK_ACCESS_2_TRANSFORM_FEEDBACK_COUNTER_READ_BIT_EXT,dstStageMaskmust include VK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT, VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03922
IfdstAccessMaskincludes VK_ACCESS_2_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT,dstStageMaskmust include VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03923
IfdstAccessMaskincludes VK_ACCESS_2_SHADING_RATE_IMAGE_READ_BIT_NV,dstStageMaskmust include VK_PIPELINE_STAGE_2_SHADING_RATE_IMAGE_BIT_NV, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-04994
IfdstAccessMaskincludes VK_ACCESS_2_INVOCATION_MASK_READ_BIT_HUAWEI,dstStageMaskmust include VK_PIPELINE_STAGE_2_INVOCATION_MASK_BIT_HUAWEI -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03924
IfdstAccessMaskincludes VK_ACCESS_2_COMMAND_PREPROCESS_READ_BIT_NV,dstStageMaskmust include VK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_NV or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03925
IfdstAccessMaskincludes VK_ACCESS_2_COMMAND_PREPROCESS_WRITE_BIT_NV,dstStageMaskmust include VK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_NV or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03926
IfdstAccessMaskincludes VK_ACCESS_2_COLOR_ATTACHMENT_READ_NONCOHERENT_BIT_EXT,dstStageMaskmust include VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03927
IfdstAccessMaskincludes VK_ACCESS_2_ACCELERATION_STRUCTURE_READ_BIT_KHR, and therayQueryfeature is enabled,dstStageMaskmust include VK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR, one of theVK_PIPELINE_STAGE_*_SHADER_BITstages, VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR, VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03928
IfdstAccessMaskincludes VK_ACCESS_2_ACCELERATION_STRUCTURE_WRITE_BIT_KHR,dstStageMaskmust include VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR, VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-06256
IfdstAccessMaskincludes VK_ACCESS_2_ACCELERATION_STRUCTURE_READ_BIT_KHR, and therayQueryfeature is not enabled,dstStageMaskmust include VK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR, VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR, VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-07272
IfdstAccessMaskincludes VK_ACCESS_2_SHADER_BINDING_TABLE_READ_BIT_KHR,dstStageMaskmust include VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT or VK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-04858
IfdstAccessMaskincludes VK_ACCESS_2_VIDEO_DECODE_READ_BIT_KHR,dstStageMaskmust include VK_PIPELINE_STAGE_2_VIDEO_DECODE_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-04859
IfdstAccessMaskincludes VK_ACCESS_2_VIDEO_DECODE_WRITE_BIT_KHR,dstStageMaskmust include VK_PIPELINE_STAGE_2_VIDEO_DECODE_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-04860
IfdstAccessMaskincludes VK_ACCESS_2_VIDEO_ENCODE_READ_BIT_KHR,dstStageMaskmust include VK_PIPELINE_STAGE_2_VIDEO_ENCODE_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-04861
IfdstAccessMaskincludes VK_ACCESS_2_VIDEO_ENCODE_WRITE_BIT_KHR,dstStageMaskmust include VK_PIPELINE_STAGE_2_VIDEO_ENCODE_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-07455
IfdstAccessMaskincludes VK_ACCESS_2_OPTICAL_FLOW_READ_BIT_NV,dstStageMaskmust include VK_PIPELINE_STAGE_2_OPTICAL_FLOW_BIT_NV -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-07456
IfdstAccessMaskincludes VK_ACCESS_2_OPTICAL_FLOW_WRITE_BIT_NV,dstStageMaskmust include VK_PIPELINE_STAGE_2_OPTICAL_FLOW_BIT_NV -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-07457
IfdstAccessMaskincludes VK_ACCESS_2_MICROMAP_WRITE_BIT_EXT,dstStageMaskmust include VK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-07458
IfdstAccessMaskincludes VK_ACCESS_2_MICROMAP_READ_BIT_EXT,dstStageMaskmust include VK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT or VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-08118
IfdstAccessMaskincludes VK_ACCESS_2_DESCRIPTOR_BUFFER_READ_BIT_EXT,dstStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one ofVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-10670
IfdstAccessMaskincludes VK_ACCESS_2_SHADER_TILE_ATTACHMENT_READ_BIT_QCOM,dstStageMaskmust include VK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT or VK_PIPELINE_STAGE_2_COMPUTE_SHADER_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-10671
IfdstAccessMaskincludes VK_ACCESS_2_SHADER_TILE_ATTACHMENT_WRITE_BIT_QCOM,dstStageMaskmust include VK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT or VK_PIPELINE_STAGE_2_COMPUTE_SHADER_BIT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-11771
IfdstAccessMaskincludes VK_ACCESS_2_MEMORY_DECOMPRESSION_READ_BIT_EXT,dstStageMaskmust include VK_PIPELINE_STAGE_2_MEMORY_DECOMPRESSION_BIT_EXT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-11772
IfdstAccessMaskincludes VK_ACCESS_2_MEMORY_DECOMPRESSION_WRITE_BIT_EXT,dstStageMaskmust include VK_PIPELINE_STAGE_2_MEMORY_DECOMPRESSION_BIT_EXT -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-11294
IfdstAccessMaskincludes VK_ACCESS_2_SAMPLER_HEAP_READ_BIT_EXT or VK_ACCESS_2_RESOURCE_HEAP_READ_BIT_EXT,dstStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one ofVK_PIPELINE_STAGE_*_SHADER_BITstages
-
VUID-VkMemoryRangeBarrierKHR-None-09097
If the VK_KHR_external_memory extension is not enabled, and the value of VkApplicationInfo::apiVersionused to create the VkInstance is not greater than or equal to Version 1.1,srcQueueFamilyIndexmust not be VK_QUEUE_FAMILY_EXTERNAL -
VUID-VkMemoryRangeBarrierKHR-None-09098
If the VK_KHR_external_memory extension is not enabled, and the value of VkApplicationInfo::apiVersionused to create the VkInstance is not greater than or equal to Version 1.1,dstQueueFamilyIndexmust not be VK_QUEUE_FAMILY_EXTERNAL -
VUID-VkMemoryRangeBarrierKHR-srcQueueFamilyIndex-09099
If the VK_EXT_queue_family_foreign extension is not enabledsrcQueueFamilyIndexmust not be VK_QUEUE_FAMILY_FOREIGN_EXT -
VUID-VkMemoryRangeBarrierKHR-dstQueueFamilyIndex-09100
If the VK_EXT_queue_family_foreign extension is not enableddstQueueFamilyIndexmust not be VK_QUEUE_FAMILY_FOREIGN_EXT -
VUID-VkMemoryRangeBarrierKHR-address-13087
If the buffer from whichaddresswas queried was created with a sharing mode of VK_SHARING_MODE_EXCLUSIVE, andsrcQueueFamilyIndexanddstQueueFamilyIndexare not equal,srcQueueFamilyIndexmust be VK_QUEUE_FAMILY_EXTERNAL, VK_QUEUE_FAMILY_FOREIGN_EXT, or a valid queue family -
VUID-VkMemoryRangeBarrierKHR-address-13088
If the buffer from whichaddresswas queried was created with a sharing mode of VK_SHARING_MODE_EXCLUSIVE, andsrcQueueFamilyIndexanddstQueueFamilyIndexare not equal,dstQueueFamilyIndexmust be VK_QUEUE_FAMILY_EXTERNAL, VK_QUEUE_FAMILY_FOREIGN_EXT, or a valid queue family -
VUID-VkMemoryRangeBarrierKHR-srcStageMask-13089
If eithersrcStageMaskordstStageMaskincludes VK_PIPELINE_STAGE_2_HOST_BIT,srcQueueFamilyIndexanddstQueueFamilyIndexmust be equal
-
VUID-VkMemoryRangeBarrierKHR-sType-sType
sTypemust be VK_STRUCTURE_TYPE_MEMORY_RANGE_BARRIER_KHR -
VUID-VkMemoryRangeBarrierKHR-srcStageMask-parameter
srcStageMaskmust be a valid combination of VkPipelineStageFlagBits2 values -
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-parameter
srcAccessMaskmust be a valid combination of VkAccessFlagBits2 values -
VUID-VkMemoryRangeBarrierKHR-dstStageMask-parameter
dstStageMaskmust be a valid combination of VkPipelineStageFlagBits2 values -
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-parameter
dstAccessMaskmust be a valid combination of VkAccessFlagBits2 values -
VUID-VkMemoryRangeBarrierKHR-addressFlags-parameter
addressFlagsmust be a valid combination of VkAddressCommandFlagBitsKHR values
Document Notes
For more information, see the Vulkan Specification.
This page is extracted from the Vulkan Specification. Fixes and changes should be made to the Specification, not directly.